Module 4.1 Semiconductors: diodes, transistors and integrated circuits

Module 4 is not required for category A. EASA paper: 20 questions for B1 and B3, 40 for B2 and B2L. B2/B2L candidates need level 2 on everything; B1/B3 need less depth.

Knowledge levels

Item	B1 / B3	B2 / B2L
4.1.1(a) Diodes: symbols, characteristics, P-N junction, parameters, SCR, LED, photodiode, rectifiers	2	2
4.1.1(b) Diode circuits (clippers, clampers, rectifiers, multipliers) and special diodes (Schottky, varactor, varistor, Zener); testing	—	2
4.1.2(a) Transistors: symbols, description, characteristics	1	2
4.1.2(b) Transistor construction, configurations, testing, FETs, amplifier classes, bias, multistage circuits, oscillators, multivibrators	—	2
4.1.3(a) ICs: logic and linear circuits / op-amps	1	2
4.1.3(b) Op-amp as integrator, differentiator, voltage follower, comparator; feedback	—	2

Semiconductor materials

• Silicon and germanium have 4 valence electrons; pure crystals ("intrinsic") conduct poorly.
• Doping adds impurities:
  • N-type: pentavalent impurity (5 valence electrons: phosphorus, arsenic, antimony) → extra free electrons are the majority carriers.
  • P-type: trivalent impurity (3 valence electrons: boron, gallium, indium) → holes are the majority carriers.
• Minority carriers (holes in N, electrons in P) are created by heat; they cause leakage current, which rises with temperature.

The P-N junction

• At the junction, electrons and holes recombine, leaving a depletion layer with no free carriers and a barrier potential: about 0.6-0.7 V for silicon, 0.2-0.3 V for germanium.
• Forward bias (P to +, N to −): the depletion layer narrows; once the barrier is overcome, current rises steeply.
• Reverse bias (P to −, N to +): the depletion layer widens; only a tiny leakage current flows until breakdown.

Diode parameters

• Peak inverse voltage (PIV): maximum reverse voltage before breakdown.
• Maximum forward current, power dissipation, leakage current (rises with temperature), frequency/switching time.
• Diodes in series share high reverse voltages (with balancing resistors); in parallel share high currents (with balancing resistors).

Rectifier circuits

Circuit	Diodes	Output frequency (from 400 Hz)	Notes
Half-wave	1	400 Hz	uses only half of each cycle; high ripple
Full-wave (centre-tap)	2	800 Hz	needs a centre-tapped transformer
Bridge	4	800 Hz	no centre tap; two diodes conduct at a time
Three-phase bridge	6	2 400 Hz	low ripple; used in TRUs and brushless generators

A smoothing capacitor (and choke) reduces ripple.

Worked example

A full-wave bridge is fed with 20 V RMS. Peak output (ignoring diode drops) = 20 × 1.414 ≈ 28.3 V; with two silicon diodes conducting, about 28.3 − 1.4 = 26.9 V. Each diode must withstand a PIV of about 28.3 V.

Other diode circuits (B2/B2L)

• Clipper (limiter): removes part of a waveform above or below a set level.
• Clamper (DC restorer): shifts the whole waveform up or down without changing its shape.
• Voltage doubler/tripler: diodes and capacitors give a DC output of about 2 or 3 times the peak input.

Special diodes

Device	Key property	Use
Zener	operated in reverse breakdown at a precise voltage	voltage regulation and reference
LED	emits light when forward biased (about 1.5-3 V)	indicators, displays
Photodiode / photo-conductive diode	reverse current increases with light	light sensors
Varactor (varicap)	capacitance varies with reverse voltage	electronic tuning
Schottky	metal-semiconductor junction, low forward drop (≈ 0.3 V), very fast	high-frequency switching, power supplies
Varistor (VDR)	resistance falls sharply above a threshold	surge suppression
SCR (thyristor)	four layers (PNPN); conducts when the gate is triggered and stays on until current falls below the holding current	power control, motor control, crowbar over-voltage protection

Key fact: Once triggered, an SCR keeps conducting even if the gate signal is removed; it turns off only when anode current falls below the holding current.

Bipolar junction transistors

• Three layers: NPN or PNP; terminals emitter, base, collector. The arrow on the emitter points in the direction of conventional current - "Not Pointing iN" = NPN.
• Normal operation: base-emitter junction forward biased, collector-base junction reverse biased.
• A small base current controls a larger collector current: current gain β (hFE) = I_C / I_B. I_E = I_B + I_C.

Worked example

β = 100, base current 50 µA.

• I_C = 100 × 50 µA = 5 mA; I_E = 5.05 mA

Configurations

Configuration	Input / output	Gain	Phase
Common emitter	base / collector	high voltage and current gain	output inverted (180°)
Common base	emitter / collector	voltage gain, current gain below 1	in phase
Common collector (emitter follower)	base / emitter	current gain, voltage gain ≈ 1	in phase; high input, low output impedance (buffer)

Amplifier classes

• Class A: conducts for the full 360° - lowest distortion, low efficiency.
• Class B: conducts 180° - used in push-pull pairs, higher efficiency, crossover distortion.
• Class AB: slightly more than 180°, reduces crossover distortion.
• Class C: less than 180° - very efficient, high distortion; RF amplifiers with tuned circuits.

Other transistor circuits (B2/B2L)

• Bias sets the operating point; decoupling capacitors bypass AC around emitter resistors; negative feedback stabilises gain and reduces distortion.
• Coupling between stages: resistive-capacitive, transformer, direct.
• Oscillators use positive feedback (e.g. LC, crystal); multivibrators: astable (free-running square wave), monostable (one pulse per trigger), bistable (flip-flop, two stable states).

Testing

With an ohmmeter (diode test), each junction should show low resistance one way and high the other. Collector-emitter should be high both ways.

Field-effect transistors

• JFET and MOSFET: voltage-controlled (gate voltage controls channel current); terminals gate, source, drain.
• Very high input impedance. MOSFETs are easily damaged by static - handle as ESD-sensitive devices (Module 5.12).

Integrated circuits and op-amps

• An IC contains many transistors, diodes, resistors and capacitors on one chip. Digital (logic) ICs process on/off signals; linear (analogue) ICs such as op-amps handle continuous signals.
• Operational amplifier: very high open-loop gain, very high input impedance, low output impedance, two inputs (inverting −, non-inverting +).
• Inverting amplifier gain = −R_f / R_in; non-inverting gain = 1 + R_f / R_in.

Op-amp circuit	Function
Integrator	output proportional to the integral (accumulated value) of input - feedback capacitor
Differentiator	output proportional to rate of change of input - input capacitor
Voltage follower	unity gain buffer - output connected to inverting input
Comparator	open loop; output swings fully high or low depending on which input is larger

• Negative feedback: reduces and stabilises gain, increases bandwidth, reduces distortion. Positive feedback: increases gain, can cause oscillation - used in oscillators and Schmitt triggers.

Worked example

Inverting amplifier, R_in = 10 kΩ, R_f = 100 kΩ, input 0.2 V.

• Gain = −100 / 10 = −10; output = −2 V

Exam tips

• Barrier potential: silicon 0.7 V, germanium 0.3 V.
• NPN: arrow out; PNP: arrow in.
• Common emitter inverts; emitter follower does not.